a, Layouts of X4 buffers with resistive pull-up (BUF_X4) are shown on the left and layouts of X4 buffers with active transistor pull-up (BUF_X4M) are shown on the right. b, Simulated responses including parasitic capacitance and resistance extracted from the layout. The maximum capacitive load of BUF_X4 is 4.8 pF, based on the data from the liberty file at the typical corner. Buffers with active pull-up can drive much higher loads and consume less static power than their resistive load counterparts at the expense of area increase and reduced output voltage range due to a drop in VDS (the voltage between the drain and source electrodes) across the pull-up transistor. For X4 cells the average static power consumption reduces by 60%, area increases by 43% and the VDS drop is 0.2 V.